Recently, in accordance with downsizing and improved performance of electronic equipment, signal processing has been developed for digitalization and higher frequencies. Also with respect to semiconductor devices working as core components in such electronic equipment, it is desired to increase the number of connection terminals and reduce the pitch between the connection terminals in accordance with increase of the circuit scale. Furthermore, it has become significant to reduce wiring delay between a semiconductor device and a wiring board and to prevent noise. Therefore, as a connection method between a semiconductor device and a wiring board, a flip-chip mounting method is employed instead of a conventional mounting method typified by wire bonding.
In the flip-chip mounting method, solder bump connection in which solder bumps, that is, projection electrodes, are formed on electrode terminals of a semiconductor device and the semiconductor device is connected as a whole to connection terminals formed on a wiring board through the solder bumps is widely employed. In a conventional solder bump formation method, however, bumps are formed merely in a hemispherical shape because solder should be melted once. Therefore, it is difficult to employ the conventional method for reducing the pitch between and increasing the number of connection terminals.
On the other hand, in another conventionally employed method, a bump made of a metal such as gold (Au) is formed on an electrode terminal of a semiconductor device and the bump is connected to a connection terminal of a wiring board with a conducting adhesive or an anisotropic conducting adhesive. This method, however, is not sufficient for reducing the pitch between and increasing the number of connection terminals in the same manner as the conventional solder bump connection.
Moreover, a recent electronic circuit is constructed mainly from semiconductor devices. Accordingly, it is desired to inexpensively mount semiconductor devices at a high density on a wiring board for realizing low cost, compactness and high performance of electronic equipment.
By such a desire, Patent Document 1 describes a technique in which a bump provided on an electrode terminal is formed in a pyramid shape having a base with a length of, for example, 10 through 60 μm and having a sharp tip. Since the bump has a sharp tip, a high mounting density can be attained without causing a connection failure in connection between a wiring board and a semiconductor device.
Also, Patent Document 2 describes a technique in which a connection terminal of a wiring board is formed in a projection shape and a recess capable of fitting a projection of the wiring board is formed on an electrode terminal of a semiconductor device so as to mount the semiconductor device on the wiring board with the projection of the wiring board fit in the recess of the semiconductor device. The connection between the terminals is carried by reflowing a metal with a low melting point provided in the recess. Thus, it is possible to realize high density mounting capable of coping with a fine pitch between electrode terminals and having high connection strength.
Furthermore, as a similar technique, Patent Document 3 describes a technique in which a recess in a shape corresponding to the shape of a projection electrode of a semiconductor device is provided on a connection terminal of a wiring board so as to mount the semiconductor device on the wiring board by fitting the projection electrode of the semiconductor device in the recess of the wiring board. Thus, it is possible to realize highly reliably high density mounting having high connection strength between a wiring board and a semiconductor device.
Moreover, Patent Document 4 describes a technique in which an insulating resin layer having an opening on a connection terminal is formed on a wiring board so as to mount a semiconductor device on the wiring board by fitting a projection electrode of the semiconductor device in the opening of the wiring board. The connection between the terminals is carried out by reflowing solder filled in the opening. Thus, it is possible to realize highly reliable high density mounting free from a connection failure.
Patent Document 1: Japanese Laid-Open Patent Publication No. 2002-93842
Patent Document 2: Japanese Laid-Open Patent Publication No. 5-13496
Patent Document 3: Japanese Laid-Open Patent Publication No. 11-17050
Patent Document 4: Japanese Laid-Open Patent Publication No. 2000-100868